Chinese translation for "digital phase-locked loop"

数字锁相环路

Related Translations:

loop:  n.1.(用线、带等打成的)圈，环，匝，框，环孔，线圈；【医学】(常 the loop)宫内避孕环。2.环状物，塔环，拎环。3.(铁路上的)让车道，环道。4.【无线电】回路，回线，波腹，环形天线。5.【数学】自变；【计算机】循环；(程序中)一群指令的重复。6.【航空】翻圈飞行，翻筋斗；【溜冰】(单脚)打圈儿。7.〔美国〕闹市区；〔the L-〕 芝加哥的商业区。短语和例子a

loops:  环结环影天线裤耳钮圈线圈循环

looping:  闭合导线观测并联电路打转防止活套折迭飞球弧线偏左，飞球线不平行而偏向内侧构成环形弧圈形的回路法回线截枝空中飞女起耳仔（疵点）套环缝合法形成活套循环烟囱成波浪状排烟自动对口型装置

looped:  adj.1.有圈[环]的；成圈[环]的。2.〔美国〕酩酊大醉的。

Example Sentences:

	1.	Digital phase - locked loop 数字锁相环
	2.	The digital phase - locked loop designed by isp , which is adapted to optical grating readout is briefly introduced 用isp设计的适合于光栅检测装置的数字锁相环在第七章作了简要的介绍。
	3.	The method of picking up synchronizated signal is digital phase - locked loop , which is picking up phase information from the suddenly toggle between codes 提取码同步信号一般采用锁相环技术,利用码元间存在的瞬间跳变获取需要的相位信息。
	4.	Secondly the theory of phased - locked loop ( pll ) is analyzed in detail , and then a method of implementing digital phased - locked loop ( dpll ) is put forward . the algorithm is well implemented using digital signal processor ( dsp ) 然后对锁相环原理进行了详细的分析，提出一种数字锁相环( dpll )的实现方法，并采用数字信号处理器( dsp )加以实现。
	5.	The results of experiment tell it is an effective method of share current . a strategy of synchronization control , which combines competition coequality and priority , is mentioned in the paper and uses digital phase - lock loop to track synchronization signal 在同步控制上，应用了“优先与抢占”的方式产生同步信号，纯硬件实现，简单可靠；使用了成熟的数字锁相环来跟踪同步信号。
	6.	We design the digital phase - locked loop applying the method designing digital circuitry from the top down . we design the circuitry by the vhdl in the maxpulsii software environment . we validate the circuitry function in the emulator 采用自顶向下的数字电路设计方法设计全数字锁相环路，在maxplusii设计环境下采用vhdl语言、 ahdl语言等设计实现数字锁相环，并通过计算机仿真证实其正确性。
	7.	The principal of the digital communication theory and the relational theory of the synchronization are introduced in fourth chapter . in fifth chapter , author detailedly describes the methods of two kind digital phase - locked loop , expounds the processing of design and implementation by fpga 第四章介绍了数字通信中位同步的相关理论,并在第五章详细叙述了两种数字锁相位同步的原理,并论述了使用fpga设计实现这两种位同步方法的过程。
	8.	In the course of the design , critical technologies are applied , such as digital phase - locked loop , fast fourier transform algorithm , universal asynchronous receiver & transmitter , and so on . in the project , as a important component , the module of monitoring the buses " power quality takes a long time 在设计过程中，使用的关键技术有：使用cpld仿真多路sspc多种状态；在对汇流条电能质量的监测过程中采用频率跟踪技术? ?全数字锁相环；应用fpga技术使用fft运算进行谐波分析；通用异步收发器等技术。

Similar Words：

"digital phase locked loop" Chinese translation, "digital phase meter" Chinese translation, "digital phase modulation circuit" Chinese translation, "digital phase shifter" Chinese translation, "digital phase-angle meter" Chinese translation, "digital phase-looked loop" Chinese translation, "digital phasemeter" Chinese translation, "digital philosophy" Chinese translation, "digital phosphor oscilloscope" Chinese translation, "digital photo" Chinese translation